Low-mismatch and low-consumption transimpedance gain circuit for temporally differentiating photo-sensing systems in dynamic vision sensors

ABSTRACT

The invention relates to a low-mismatch and low-consumption transimpedance gain circuit for temporally differentiating photo-sensing systems in dynamic vision sensors, which uses at least one photodiode and at least two in-series transistors, each of the transistors being connected in diode configuration and being positioned at the output of the photodiode. The output current from the photodiode flows through the drain-source channels of the transistors and the source of the last transistor in series is connected to a voltage selected from ground voltage, a constant voltage or a controlled voltage.

OBJECT OF THE INVENTION

The present invention, as expressed in the present descriptivespecification, refers to a low-mismatch and low-consumptiontransimpedance gain circuit for temporally differentiating photo-sensingsystems in dynamic vision sensors (DVS), by means of transistorsconnected in diode.

The invention falls within the field of electronic circuits, especiallylow-consumption reduced-area analog integrated circuits. The circuitspecifically pertains to the category of voltage current preamplifiersor in other words, transimpedance.

BACKGROUND OF THE INVENTION

Dynamic vision sensors (DVS) are new integrated circuits of the videocamera variety, although they are not specifically such. In commercialvideo cameras, the apparatus records photogram after photogram. In DVS,there are no photograms. The integrated circuit contains a photo sensormatrix, similar to video cameras. In video cameras, each photo sensor issampled with a fixed frequency. However, in DVS, the pixels are notsampled. Every pixel calculates the time derivative of the light itsenses, and when this exceeds a certain level (threshold), the pixelemits an “event” outwards. The event usually consists of the (x,y)coordinate of the pixel within the two-dimensional photo sensor matrix.In this way, the output of a DVS consists of a flow of (x,y) coordinatesof the various pixels that detect a change in the intensity they sense.This type of DVS sensor were reported for the first time byLichtsteiner, Delbruck and Posch in 2006 (“A 128×128 120 dB 30 mWAsynchronous Vision Sensor that Responds to Relative Intensity Change”in Visuals Supplement to ISSCC Dig. Of Tech. Papers, San Fransisco,2006, vol., pp 508-509 (27.9) and subsequently in more detail in P.Lichtsteiner, C. Posch and T. Delbruck, (“A 128×128 120 dB 15 μs LatencyAsynchronous Temporal Contrast Vision Sensor”, IEEE J. Solid-StateCircuits, vol. 43, No. 2, pp. 566-576, February 2008).

More recently, Posch has reported a new prototype (C. Posch, D. Matolinand R. Wohlgenannt, “A QGVA 143 dB dynamic range asynchronousaddress-event PWM dynamic image sensor with lossless pixel levelvideo-compression”, Solid-State Circuits, 2010 IEEE InternationalConference ISSCC, Dig of Tech Paper, pp. 400-401, February 2010).

However, in these DVS sensors, the photocurrent I_(ph) sensed by a photosensor is firstly transformed into voltage by means of a logarithmicconversion. This voltage is firstly amplified and its time derivativesubsequently calculated. A crucial parameter is the voltage gain in thisfirst amplification. The greater the amplification, the more sensitivethe sensor will be to the “Temporal Contrast”. The problem is that thisamplification should be carried out within each pixel of the matrix andshould be carried out by a circuit which consumes little power andlittle area in the microchip. Moreover, it is important that it iscarried out by a circuit which does not undergo too much dispersion inthe gain value from one pixel to another, given that in the contrarycase, it would introduce much variation into the behaviour of thevarious pixels in comparison to one another, thereby reducing theoverall sensitivity of the sensor. The DVS reported to date employvoltage amplification stages based on circuits with capacitors. Inintegrated analog circuits, the condensers have low-dispersion betweenone another and are therefore highly suitable for carrying out voltageamplification stages. However, in DVS, obtaining voltage gains of around20 to 100 (or over) is desirable. Upon doing so with condensers, atleast two condensers are required, the value proportion of which isequal to that of the desired gain. Given that the area of the condensersis proportional to their value this means that one of the condensersshould have an area which is between 20 and 100 times greater than theother. The end result is that a large part of the area of the pixel isconsumed in the condensers.

A possible alternative may be to obtain the voltage gain by means of twoconsecutive stages, given that the gain of each stage is multiplied.However, the synchronisation required between the two consecutive stagesalso makes it too long, thus reducing the speed of the DVS dramatically.

DESCRIPTION OF THE INVENTION

In order to achieve the objectives and avoid the limitations set outabove, the present invention consists of a low-mismatch andlow-consumption transimpedance gain circuit for temporallydifferentiating photo-sensing systems in dynamic vision sensors (DVS),by means of transistors connected in diode.

Therefore, the present invention refers to a low-mismatch andlow-consumption transimpedance gain circuit for temporallydifferentiating photo-sensing systems in dynamic vision sensors (DVS),which employs at least one photodiode, the system being characterised inthat it comprises at least two in-series transistors, each one of thetransistors being connected in diode configuration and being positionedat the output of the photodiode, the output current of the photodiodeflowing through the drain-source channels of the transistors and thesource of the last in-series transistor being connected to a voltageselected from an ground voltage, a constant voltage and a controlledvoltage. Therefore, the pixels of the cameras which make use of dynamicvision sensors, also known as DVS cameras, need at least one photosensorto generate the input current to the transimpedance circuit. However, ifsaid circuit is used in another context, the input current may come fromanother circuit or element which is not a photodiode. In fact, whenseveral of these stages are used in cascade, for example, only the firstone receives the current from the photodiode; the rest receive it from atransistor.

In a preferred embodiment of the invention, the at least two transistorshave a exponential voltage-current characteristic.

In another preferred embodiment of the invention, the transistors are ofthe FET (field-effect transistor) variety, being polarised in weakinversion.

In a further preferred embodiment of the invention, the circuitcomprises a number of means for controlling the polarity of theelectrical current generated in the photodiode, the means forcontrolling the polarity are positioned between the photodiode and theat least two transistors. These means for controlling the polarity areoptional and improve the output of the circuit by obtaining a fastercircuit response.

In an additional embodiment of the invention, the means for controllingthe polarity comprise electrical current copying and inversion means.

In another preferred embodiment of the invention, the means forcontrolling polarity comprise electrical current amplification means.

In an additional further embodiment of the invention, the means forcontrolling the polarity are a current mirror in series with thephotodiode, the output current of the means for controlling the polarityconstituting that which flows through the drain-source channels of theat least two transistors.

In another preferred embodiment of the invention, the circuit comprisesa circuit for automatically controlling the gain of the current mirrorbetween the current mirror and the at least two transistors.

In a further preferred embodiment of the invention, the currentcomprises having logarithmic dependence between the output voltage, incomparison to the current generated by the photodiode.

In addition, the present invention considers the use of the low-mismatchand low-consumption transimpedance gain circuit for temporallydifferentiating photo-sensing systems in DVS for generating a voltageamplification stage by means of positioning said transimpedance gaincircuit as a stage prior to a transconductance circuit.

The present invention also comprises the use of the low-mismatch andlow-consumption transimpedance gain circuit for temporallydifferentiating photo-sensing systems in DVS to generate a voltageamplification stage by means of positioning the transimpedance gaincircuit as a stage subsequent to a transconductance circuit.

Furthermore, the present invention also comprises the use of thelow-mismatch and low-consumption transimpedance gain circuit fortemporarily differentiating photo-sensing systems in DVS as a stageprior to a signal branch circuit for sending the signal to the outputwhich eliminates the continuous voltage of the output signal of thetransimpedance gain circuit, thereby reducing dispersions between all ofthe pixels.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is an example of an embodiment of the present invention,comprising one single stage.

FIG. 2 is an example of an embodiment of the invention, wherein thecircuit is composed of two stages.

FIG. 3 is an example of an embodiment in the circuit, wherein thecircuit comprises having two stages, each one of which has a gain equalto “3”.

DESCRIPTION OF VARIOUS EXAMPLE EMBODIMENTS OF THE INVENTION

Below is an illustrative and non-limiting description of variousparticular embodiments of the invention, making reference to thenumbering adopted in the figures.

In the present invention, the circuit that transforms the photocurrentto a voltage, by means of a logarithmic conversion, carries out,implicitly, a voltage amplification with low dispersion of the gainbetween the various pixels within the same microchip.

Therefore, FIG. 1 shows the most basic embodiment of the circuit, objectof the invention. Said particular embodiment comprises a photodiode (1),which generates a photocurrent I_(ph), which is amplified by means of acurrent mirror (2) having a gain A. The amplified current leads to achain of N transistors (3, 4 and 5), N being a natural number, all ofwhich have connected their gate to their drain, which is known byconnection in diode configuration. Please note that FIG. 1 shows 3transistors, which may in reality be any number N of transistors.

In the event of an embodiment with NMOS FET transistors, the voltagedifference formed in each transistor (3, 4 and 5), polarised in weakinversion, is approximately the same and equals

$V = {{nU}_{T}{\ln \left( \frac{{AI}_{ph}}{I_{g}} \right)}}$

In this way, the voltage obtained in the highest transistor isapproximately

$V_{N} = {{NnU}_{T}{\ln \left( \frac{{AI}_{ph}}{I_{g}} \right)}}$

In an embodiment of the integrated circuit, the parameters A,corresponding to the gain of the current mirror and I_(g) correspondingto a parameter characteristic of the FET transistor, usually referred toas “specific current”, undergo great variation from pixel to pixel,whilst U_(T) is an equal physical constant for all the pixels. Theparameter n, corresponding to a further parameter characteristic of theFET transistor usually known as “gradient factor” undergoes a relativelylow variation from pixel to pixel. When the output voltage V_(N) istaken to the branched circuit, it provides the output

$\frac{V_{N}}{t} = {{NnU}_{T}\frac{I_{ph}^{\prime}}{I_{ph}}}$

In such a way that this circuit adds the N factor (N being the number oftransistors in each stage) to the gain obtained by means of previoustechniques and the parameters which undergo great dispersions from pixelto pixel A and I_(g) do not intervene.

In practice it is not possible to use very high N values, being limitedto 3 or 4. However, it is possible to connect different stages incascade, like those shown in FIG. 1. This is shown in FIG. 2, where thefirst stage has N₁ in-series transistors and the second stage has N₂.

The voltage formed in the first block V_(N1) (3) is carried to the gateof a transistor (11) with the source connected to V_(Q), generating acurrent

$I_{2} = {I_{s\; 2}^{\frac{V_{N\; 2} - {nV}_{Q}}{{nU}_{T}}}}$

Upon deriving the output from the circuit V_(N1), the followingapproximate result is obtained:

$\frac{V_{N\; 2}}{t} = {N_{1}N_{2}{nU}_{T}\frac{I_{ph}^{\prime}}{I_{ph}}}$

Once again, the parameters of high dispersion index between pixels donot appear in the final equation. This method makes it possible toexpand to more successive stages.

FIG. 3 shows an exemplary embodiment with two stages, each one anadditional gain “3”. It shows a possible embodiment of the currentmirrors. In order to achieve said additional gain, 3 FET transistors(3′, 4′ and 5′) have been employed in cascade in each one of the steps.A FET transistor (11) is positioned at the input of the second stagewith the source connected to a voltage V_(Q) in order to generate thecurrent I₂.

The current mirrors are basic circuits well known in literature onanalog integrated circuit design. These copy the current in its inputbranch to the output branch, giving to said output branch an optionalamplification or attenuation. In FIG. 3, the current mirror of the firststage is formed by three elements, two PMOS FET transistors (6, 7) beingwith their gate connected to respective constant voltage V_(a) and V_(b)and a voltage amplifier (8) with a gain which is high enough to generatethe “virtual ground” conditions in the node that joins the photodiode(1) to the first PMOS transistor (6), thus improving the velocity of thecircuit noticeably. The current mirror of the second stage (8, 9 and 10)is identical to that of the first stage, although it may be polarizedwith different voltages V_(c) and V_(d), which would give rise to adifferent gain.

These circuits, which are repeated for each pixel, should becomplemented by a number of polarisation circuits, shared between allthe pixels, in order to fix the voltages V_(a), V_(b), V_(c), V_(d) andV_(Q).

In the specific case of using DVS cameras, at least one photodiode isrequired to capture light in each pixel. Therefore, in each pixel of theDVS camera, there would be a transimpedance stage (or stages incascade).

If the stage is used in a context other than that of the DVS cameras,the input current may come from another circuit which is not aphotodiode. In fact, for example, when several of these stages are usedin cascade, only the first receives the current from the diode. The restreceive it from a transistor.

1. Low-mismatch and low-consumption transimpedance gain circuit fortemporally differentiating photo-sensing systems in dynamic visionsensors, which employs at least one photodiode, wherein the systemcomprises at least two in-series transistors, each one of thetransistors being connected in diode configuration and being positionedat the output of the photodiode, the output current of the photodiodeflowing through the drain-source channels of the transistors and thelast in-series transistor having the source connected to a voltageselected between an ground voltage, a constant voltage and a controlledvoltage.
 2. Transimpedance gain circuit according to claim 1, whereinthe at least two transistors have an exponential type current-voltagecharacteristic.
 3. Transimpedance gain circuit according to claim 2,wherein when the transistors are FET transistors and they are polarizedin weak inversion.
 4. Transimpedance gain circuit according to claim 1,wherein it comprises means for controlling polarity of the electricalcurrent generated in the photodiode, the means for controlling thepolarity being positioned between the at least one photodiode and the atleast two transistors.
 5. Transimpedance gain circuit according to claim4, wherein the means for controlling the polarity comprise electriccurrent copying and inversion means.
 6. Transimpedance gain circuitaccording to claim 5, wherein the means for controlling the polaritycomprise electric current amplification mean.
 7. Transimpedance gaincircuit according to claim 5, wherein the means for controlling thepolarity are a current mirror in series with the photodiode, the outputcurrent of the means for controlling the polarity being that which flowsthrough the drain-source channels of the at least two transistors. 8.Transimpedance gain circuit according to claim 7, wherein it comprises acircuit for automatically controlling the gain of the current mirrorplaced between the current mirror and the at least two transistors. 9.Transimpedance gain circuit according to claim 1, wherein it compriseshaving a logarithmic dependence between the output voltage versus thecurrent generated by the photodiode.
 10. Use of the transimpedance gaincircuit defined in claim 1 for generating a current amplification stageby means of positioning the transimpedance gain circuit as a stage priorto a transconductance circuit.
 11. Use of the transimpedance gaincircuit defined in claim 1 for generating a voltage amplification stageby means of positioning the transimpedance gain circuit as a stagesubsequent to a transconductance circuit.
 12. Use of the transimpedancegain circuit defined in claim 1 to be employed as a stage prior to abranch circuit for the signal at the output which eliminates thecontinuous voltage of the output signal of the transimpedance gaincircuit, thereby reducing dispersions among the pixels. 13.Transimpedance gain circuit according to claim 6, wherein the means forcontrolling the polarity are a current mirror in series with thephotodiode, the output current of the means for controlling the polaritybeing that which flows through the drain-source channels of the at leasttwo transistors.
 14. Transimpedance gain circuit according to claim 4,wherein it comprises having a logarithmic dependence between the outputvoltage versus the current generated by the photodiode.
 15. Use of thetransimpedance gain circuit defined in claim 4 for generating a currentamplification stage by means of positioning the transimpedance gaincircuit as a stage prior to a transconductance circuit.
 16. Use of thetransimpedance gain circuit defined in claim 4 for generating a voltageamplification stage by means of positioning the transimpedance gaincircuit as a stage subsequent to a transconductance circuit.
 17. Use ofthe transimpedance gain circuit defined in claim 4 to be employed as astage prior to a branch circuit for the signal at the output whicheliminates the continuous voltage of the output signal of thetransimpedance gain circuit, thereby reducing dispersions among thepixels.